//***********************************************
//Project Name  		    :   dlxxx_640*512
//File Name				    :   agc_new.v
//Author				    :   LiXiaoxiang
//Date of Creation		    :   2008-9-27
//Functional Description    :   ��ÿ��ͼ����ƽ��ֵ���Զ���ƽ����
//						    �ֶ��ɵ���ƽ�����ͳ��̶����棨30��
//Revision History		    :
//Change Log			    :
//***********************************************
`timescale  1ns/100ps

module  ava_new(
        
                input				Clk_sys             ,
                input				Field_reset_in      ,
                input				Data_valid_in       ,
                input		[13:0]	Ifr_data_in         ,
                output	reg	[13:0]	Average              
                );
        
reg [32:0]sum=0;
reg [23:0]pxiel_num=0;

always@(posedge Clk_sys)begin
   if (Field_reset_in)begin
       sum[32:0]        <=33'b0;
       pxiel_num[23:0]  <=24'b0;
   end
   else if ((Data_valid_in==1) && (pxiel_num<24'h40000)) begin//'h40000='d262144=512*512
       sum[32:0]        <=sum[32:0]+Ifr_data_in[13:0];
       pxiel_num[23:0]  <=pxiel_num[23:0]+1'b1;
   end   
   else begin
	end
end
reg [13:0] Average_temp=0;
always @(posedge Clk_sys) begin
	if(pxiel_num==24'h40000) begin
		Average_temp<=sum[31:18];
	end
	else begin
	end
end

always@(posedge Clk_sys)begin
   if (Field_reset_in)begin
       Average<=Average_temp;
   end
end


endmodule